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A Fast time-domain simulation algorithm for the power electronic circuits

Research output: Chapters, Conference Papers, Creative and Literary WorksRGC 32 - Refereed conference paper (with host publication)peer-review

Abstract

A new technique for the time-domain simulation of power electronic circuits is presented. The methodology is based on stepwise quadratic extrapolation of the reactive element branch voltages with progressive validation of the switches' operations. The prominent features of this algorithm are (1) its simplicity of solving resistive network throughout the analysis without dealing with any complicated Laplace-transformed equation or differential formula, (2) its generality of determining the topological configuration without a priori understanding of the switching relationships, and (3) its consideration of the effects of parasitic elements. An example of a practical switch-mode buck regulator with overcurrent protection and maximum duty-cycle control is illustrated. The simulated results are favorably verified with the waveforms obtained by other available literature. © 1996 IEEE
Original languageEnglish
Title of host publicationProceedings of the 1996 IEEE IECON
Subtitle of host publication22nd International Conference on Industrial Electronics, Control, and Instrumentation
PublisherIEEE
Pages659-664
Volume2
ISBN (Print)0-7803-2775-6
DOIs
Publication statusPublished - Aug 1996
Event22nd International Conference on Industrial Electronics, Control, and Instrumentation (IECON'96) - Taipei, Taiwan, China
Duration: 5 Aug 199610 Aug 1996

Publication series

NameIECON Proceedings (Industrial Electronics Conference)

Conference

Conference22nd International Conference on Industrial Electronics, Control, and Instrumentation (IECON'96)
PlaceTaiwan, China
CityTaipei
Period5/08/9610/08/96

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