TY - GEN
T1 - A Customizable Stochastic State Point Process Filter (SSPPF) for Neural Spiking Activity
AU - Xin, Yao
AU - Li, Will X.Y.
AU - Min, Biao
AU - Han, Yan
AU - Cheung, Ray C.C.
PY - 2013/7
Y1 - 2013/7
N2 - Stochastic State Point Process Filter (SSPPF) is effective for adaptive signal processing. In particular, it has been successfully applied to neural signal coding/decoding in recent years. Recent work has proven its efficiency in non-parametric coefficients tracking in modeling of mammal nervous system. However, existing SSPPF has only been realized in commercial software platforms which limit their computational capability. In this paper, the first hardware architecture of SSPPF has been designed and successfully implemented on field-programmable gate array (FPGA), proving a more efficient means for coefficient tracking in a well-established generalized Laguerre-Volterra model for mammalian hippocampal spiking activity research. By exploring the intrinsic parallelism of the FPGA, the proposed architecture is able to process matrices or vectors with random size, and is efficiently scalable. Experimental result shows its superior performance comparing to the software implementation, while maintaining the numerical precision. This architecture can also be potentially utilized in the future hippocampal cognitive neural prosthesis design.
AB - Stochastic State Point Process Filter (SSPPF) is effective for adaptive signal processing. In particular, it has been successfully applied to neural signal coding/decoding in recent years. Recent work has proven its efficiency in non-parametric coefficients tracking in modeling of mammal nervous system. However, existing SSPPF has only been realized in commercial software platforms which limit their computational capability. In this paper, the first hardware architecture of SSPPF has been designed and successfully implemented on field-programmable gate array (FPGA), proving a more efficient means for coefficient tracking in a well-established generalized Laguerre-Volterra model for mammalian hippocampal spiking activity research. By exploring the intrinsic parallelism of the FPGA, the proposed architecture is able to process matrices or vectors with random size, and is efficiently scalable. Experimental result shows its superior performance comparing to the software implementation, while maintaining the numerical precision. This architecture can also be potentially utilized in the future hippocampal cognitive neural prosthesis design.
UR - http://www.scopus.com/inward/record.url?scp=84886530708&partnerID=8YFLogxK
UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-84886530708&origin=recordpage
U2 - 10.1109/EMBC.2013.6610669
DO - 10.1109/EMBC.2013.6610669
M3 - RGC 32 - Refereed conference paper (with host publication)
C2 - 24110856
SN - 9781457702167
T3 - Conference proceedings : ... Annual International Conference of the IEEE Engineering in Medicine and Biology Society
SP - 4993
EP - 4996
BT - 2013 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC) proceedings
PB - IEEE
T2 - 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (IEEE EMBC'13)
Y2 - 3 July 2013 through 7 July 2013
ER -