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A Control Strategy for Solid-State Transformers with Coupled Load Disturbance Attenuation Ability

  • Radhika Sarda*
  • , Ezequiel Rodriguez Ramos
  • , Naga Brahmendra Yadav Gorla
  • , Glen G. Farivar
  • , Josep Pou
  • , Yeo Howe Li
  • , Sriram B. Vaisambhayana
  • , Anshuman Tripathi
  • *Corresponding author for this work

Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

Abstract

The architecture of solid-state transformers (SSTs) is usually comprised with three-stage cascaded converters. The control of cascaded multistage SSTs is conventionally designed considering decoupled stages. Furthermore, the isolating stage, which is typically implemented with dual active bridge converters, employs a closed-loop control with a much larger bandwidth (BW) than the ac-dc stage. This disparity in the BWs can put a strain on the intermediate dc-link capacitors that connect the ac-dc and isolating stages, resulting in large capacitor voltage excursions when the load changes. In fact, this can result in ac-dc stage overmodulation and even large current overshoots through the isolating stage's high-frequency transformers. This necessitates advanced SST control strategies that can mitigate the aforementioned challenges. This article proposes a control design in which the state variables are selected as the sum of capacitor energies and differences in capacitor energies. Unlike the state-of-the-art SST controllers, the proposed integrated control approach creates a more balanced and safe distribution of energies among the dc-link capacitors during load transients. The control design is simplified as the difference in the control-loop BWs between the stages does not affect this disturbance attenuation ability. The effectiveness of the proposed control is demonstrated by experiments using a 1-kVA SST with two strings. © 1986-2012 IEEE.
Original languageEnglish
Pages (from-to)4029-4041
JournalIEEE Transactions on Power Electronics
Volume39
Issue number4
Online published29 Dec 2023
DOIs
Publication statusPublished - Apr 2024
Externally publishedYes

Funding

This work was supported by US Patent under Grant US20230402936A1.

Research Keywords

  • Capacitor energy balancing
  • cascaded systems
  • disturbance attenuation
  • solid-state transformer (SST)

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