A CMOS Active Balun-LNA With Imbalance Correction and Noise Cancelling

Pei Qin; Quan Xue

doi:10.1109/iWEM.2016.7505076

A CMOS Active Balun-LNA With Imbalance Correction and Noise Cancelling

Pei Qin^*, Quan Xue

^*Corresponding author for this work

Department of Electrical Engineering

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

10 Citations (Scopus)

Abstract

This paper presents an active balun topology with differential imbalance correction and noise cancelling schemes. The imbalance correction scheme can effectively ameliorate both the magnitude and phase errors induced by circuit asymmetry, parasitic and layout mismatch. Noise cancelling exists in each individual stage, which leads to good noise performance. With sufficient gain and low noise figure, this balun can also work as a low noise amplifier (LNA) in RF front end. Implemented in 65nm CMOS process, the balun-LNA exhibits maximum power gain of 16dB, minimum noise figure of 3.8dB and input matching better than -20dB. The measured magnitude and phase errors are less than 0.6dB and 7 degrees, respectively.

Original language	English
Title of host publication	2016 IEEE INTERNATIONAL WORKSHOP ON ELECTROMAGNETICS: APPLICATIONS AND STUDENT INNOVATION COMPETITION (IWEM)
Publisher	IEEE
Pages	1-3
DOIs	https://doi.org/10.1109/iWEM.2016.7505076
Publication status	Published - 2016
Event	2016 IEEE International Workshop on Electromagnetics (iWEM2016): Applications and Student Innovation Competition - Nanjing, China Duration: 16 May 2016 → 18 May 2016

Conference

Conference	2016 IEEE International Workshop on Electromagnetics (iWEM2016): Applications and Student Innovation Competition
Place	China
City	Nanjing
Period	16/05/16 → 18/05/16

Research Keywords

Active balun
low noise amplifier (LNA)
phase errors
magnitude errors
imbalance correction
noise cancelling schemes
CMOS integrated circuits
baluns
integrated circuit layout
low noise amplifiers
radiofrequency amplifiers
CMOS active balun-LNA
CMOS process
RF front end
active balun topology
circuit asymmetry
differential imbalance correction
gain 16 dB
layout mismatch
noise figure
noise figure 3.8 dB
noise performance
parasitic mismatch
size 65 nm
Decision support systems
Impedance matching
Noise cancellation
Radiofrequency integrated circuits
low noise amplifier
Low-noise amplifiers
magnitude error
phase error

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@inproceedings{6ca542ff2f614345a4ea85495032061b,

title = "A CMOS Active Balun-LNA With Imbalance Correction and Noise Cancelling",

abstract = "This paper presents an active balun topology with differential imbalance correction and noise cancelling schemes. The imbalance correction scheme can effectively ameliorate both the magnitude and phase errors induced by circuit asymmetry, parasitic and layout mismatch. Noise cancelling exists in each individual stage, which leads to good noise performance. With sufficient gain and low noise figure, this balun can also work as a low noise amplifier (LNA) in RF front end. Implemented in 65nm CMOS process, the balun-LNA exhibits maximum power gain of 16dB, minimum noise figure of 3.8dB and input matching better than -20dB. The measured magnitude and phase errors are less than 0.6dB and 7 degrees, respectively.",

keywords = "Active balun, low noise amplifier (LNA), phase errors, magnitude errors, imbalance correction, noise cancelling schemes, CMOS integrated circuits, baluns, integrated circuit layout, low noise amplifiers, radiofrequency amplifiers, CMOS active balun-LNA, CMOS process, RF front end, active balun topology, circuit asymmetry, differential imbalance correction, gain 16 dB, layout mismatch, noise figure, noise figure 3.8 dB, noise performance, parasitic mismatch, size 65 nm, Decision support systems, Impedance matching, Noise cancellation, Radiofrequency integrated circuits, low noise amplifier, Low-noise amplifiers, magnitude error, phase error",

author = "Pei Qin and Quan Xue",

year = "2016",

doi = "10.1109/iWEM.2016.7505076",

language = "English",

pages = "1--3",

booktitle = "2016 IEEE INTERNATIONAL WORKSHOP ON ELECTROMAGNETICS: APPLICATIONS AND STUDENT INNOVATION COMPETITION (IWEM)",

publisher = "IEEE",

address = "United States",

note = "2016 IEEE International Workshop on Electromagnetics (iWEM2016): Applications and Student Innovation Competition ; Conference date: 16-05-2016 Through 18-05-2016",

}

Qin, P & Xue, Q 2016, A CMOS Active Balun-LNA With Imbalance Correction and Noise Cancelling. in 2016 IEEE INTERNATIONAL WORKSHOP ON ELECTROMAGNETICS: APPLICATIONS AND STUDENT INNOVATION COMPETITION (IWEM). IEEE, pp. 1-3, 2016 IEEE International Workshop on Electromagnetics (iWEM2016): Applications and Student Innovation Competition, Nanjing, China, 16/05/16. https://doi.org/10.1109/iWEM.2016.7505076

A CMOS Active Balun-LNA With Imbalance Correction and Noise Cancelling. / Qin, Pei; Xue, Quan.
2016 IEEE INTERNATIONAL WORKSHOP ON ELECTROMAGNETICS: APPLICATIONS AND STUDENT INNOVATION COMPETITION (IWEM). IEEE, 2016. p. 1-3.

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

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N2 - This paper presents an active balun topology with differential imbalance correction and noise cancelling schemes. The imbalance correction scheme can effectively ameliorate both the magnitude and phase errors induced by circuit asymmetry, parasitic and layout mismatch. Noise cancelling exists in each individual stage, which leads to good noise performance. With sufficient gain and low noise figure, this balun can also work as a low noise amplifier (LNA) in RF front end. Implemented in 65nm CMOS process, the balun-LNA exhibits maximum power gain of 16dB, minimum noise figure of 3.8dB and input matching better than -20dB. The measured magnitude and phase errors are less than 0.6dB and 7 degrees, respectively.

AB - This paper presents an active balun topology with differential imbalance correction and noise cancelling schemes. The imbalance correction scheme can effectively ameliorate both the magnitude and phase errors induced by circuit asymmetry, parasitic and layout mismatch. Noise cancelling exists in each individual stage, which leads to good noise performance. With sufficient gain and low noise figure, this balun can also work as a low noise amplifier (LNA) in RF front end. Implemented in 65nm CMOS process, the balun-LNA exhibits maximum power gain of 16dB, minimum noise figure of 3.8dB and input matching better than -20dB. The measured magnitude and phase errors are less than 0.6dB and 7 degrees, respectively.

KW - Active balun

KW - low noise amplifier (LNA)

KW - phase errors

KW - magnitude errors

KW - imbalance correction

KW - noise cancelling schemes

KW - CMOS integrated circuits

KW - baluns

KW - integrated circuit layout

KW - low noise amplifiers

KW - radiofrequency amplifiers

KW - CMOS active balun-LNA

KW - CMOS process

KW - RF front end

KW - active balun topology

KW - circuit asymmetry

KW - differential imbalance correction

KW - gain 16 dB

KW - layout mismatch

KW - noise figure

KW - noise figure 3.8 dB

KW - noise performance

KW - parasitic mismatch

KW - size 65 nm

KW - Decision support systems

KW - Impedance matching

KW - Noise cancellation

KW - Radiofrequency integrated circuits

KW - low noise amplifier

KW - Low-noise amplifiers

KW - magnitude error

KW - phase error

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U2 - 10.1109/iWEM.2016.7505076

DO - 10.1109/iWEM.2016.7505076

M3 - RGC 32 - Refereed conference paper (with host publication)

SP - 1

EP - 3

BT - 2016 IEEE INTERNATIONAL WORKSHOP ON ELECTROMAGNETICS: APPLICATIONS AND STUDENT INNOVATION COMPETITION (IWEM)

PB - IEEE

T2 - 2016 IEEE International Workshop on Electromagnetics (iWEM2016): Applications and Student Innovation Competition

Y2 - 16 May 2016 through 18 May 2016

ER -

A CMOS Active Balun-LNA With Imbalance Correction and Noise Cancelling

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