A 75kb SRAM in 65nm CMOS for in-memory computing based neuromorphic image denoising

Sumon Kumar Bose; Vivek Mohan; Arindam Basu

doi:10.1109/iscas45731.2020.9181218

A 75kb SRAM in 65nm CMOS for in-memory computing based neuromorphic image denoising

Sumon Kumar Bose, Vivek Mohan, Arindam Basu

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

7 Citations (Scopus)

Abstract

This paper presents an in-memory computing (IMC) architecture for image denoising. The proposed SRAM based in-memory processing framework works in tandem with approximate computing on a binary image generated from neuromorphic vision sensors. Implemented in TSMC 65nm process, the proposed architecture enables ≈ 2000 X energy savings (≈ 222 X from IMC) compared to a digital implementation when tested with the video recordings from a DAVIS sensor and achieves a peak throughput of 1.25 − 1.66 frames/µs.

Original language	English
Title of host publication	2020 IEEE International Symposium on Circuits and Systems (ISCAS) - Proceedings
Publisher	IEEE
ISBN (Print)	9781728133201
DOIs	https://doi.org/10.1109/iscas45731.2020.9181218
Publication status	Published - 2020
Externally published	Yes
Event	52nd IEEE International Symposium on Circuits and Systems (ISCAS 2020) - Virtual, Sevilla, Spain Duration: 10 Oct 2020 → 21 Oct 2020 https://iscas2020.org/

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2020-October
ISSN (Print)	0271-4310
ISSN (Electronic)	2158-1525

Conference

Conference	52nd IEEE International Symposium on Circuits and Systems (ISCAS 2020)
Abbreviated title	ISCAS2020
Country/Territory	Spain
City	Sevilla
Period	10/10/20 → 21/10/20
Internet address	https://iscas2020.org/

Research Keywords

Approximate computing
In-memory computing
Median filter
Neuromorphic vision sensors
SRAM

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10.1109/iscas45731.2020.9181218

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@inproceedings{a022e828dece44caa0aba2e0b5783b07,

title = "A 75kb SRAM in 65nm CMOS for in-memory computing based neuromorphic image denoising",

abstract = "This paper presents an in-memory computing (IMC) architecture for image denoising. The proposed SRAM based in-memory processing framework works in tandem with approximate computing on a binary image generated from neuromorphic vision sensors. Implemented in TSMC 65nm process, the proposed architecture enables ≈ 2000 X energy savings (≈ 222 X from IMC) compared to a digital implementation when tested with the video recordings from a DAVIS sensor and achieves a peak throughput of 1.25 − 1.66 frames/µs.",

keywords = "Approximate computing, In-memory computing, Median filter, Neuromorphic vision sensors, SRAM",

author = "Bose, {Sumon Kumar} and Vivek Mohan and Arindam Basu",

year = "2020",

doi = "10.1109/iscas45731.2020.9181218",

language = "English",

isbn = "9781728133201",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

publisher = "IEEE",

booktitle = "2020 IEEE International Symposium on Circuits and Systems (ISCAS) - Proceedings",

address = "United States",

note = "52nd IEEE International Symposium on Circuits and Systems (ISCAS 2020), ISCAS2020 ; Conference date: 10-10-2020 Through 21-10-2020",

url = "https://iscas2020.org/",

}

Bose, SK, Mohan, V & Basu, A 2020, A 75kb SRAM in 65nm CMOS for in-memory computing based neuromorphic image denoising. in 2020 IEEE International Symposium on Circuits and Systems (ISCAS) - Proceedings., 9181218, Proceedings - IEEE International Symposium on Circuits and Systems, vol. 2020-October, IEEE, 52nd IEEE International Symposium on Circuits and Systems (ISCAS 2020), Sevilla, Spain, 10/10/20. https://doi.org/10.1109/iscas45731.2020.9181218

A 75kb SRAM in 65nm CMOS for in-memory computing based neuromorphic image denoising. / Bose, Sumon Kumar; Mohan, Vivek; Basu, Arindam.
2020 IEEE International Symposium on Circuits and Systems (ISCAS) - Proceedings. IEEE, 2020. 9181218 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2020-October).

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

TY - GEN

T1 - A 75kb SRAM in 65nm CMOS for in-memory computing based neuromorphic image denoising

AU - Bose, Sumon Kumar

AU - Mohan, Vivek

AU - Basu, Arindam

PY - 2020

Y1 - 2020

N2 - This paper presents an in-memory computing (IMC) architecture for image denoising. The proposed SRAM based in-memory processing framework works in tandem with approximate computing on a binary image generated from neuromorphic vision sensors. Implemented in TSMC 65nm process, the proposed architecture enables ≈ 2000 X energy savings (≈ 222 X from IMC) compared to a digital implementation when tested with the video recordings from a DAVIS sensor and achieves a peak throughput of 1.25 − 1.66 frames/µs.

AB - This paper presents an in-memory computing (IMC) architecture for image denoising. The proposed SRAM based in-memory processing framework works in tandem with approximate computing on a binary image generated from neuromorphic vision sensors. Implemented in TSMC 65nm process, the proposed architecture enables ≈ 2000 X energy savings (≈ 222 X from IMC) compared to a digital implementation when tested with the video recordings from a DAVIS sensor and achieves a peak throughput of 1.25 − 1.66 frames/µs.

KW - Approximate computing

KW - In-memory computing

KW - Median filter

KW - Neuromorphic vision sensors

KW - SRAM

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U2 - 10.1109/iscas45731.2020.9181218

DO - 10.1109/iscas45731.2020.9181218

M3 - RGC 32 - Refereed conference paper (with host publication)

SN - 9781728133201

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

BT - 2020 IEEE International Symposium on Circuits and Systems (ISCAS) - Proceedings

PB - IEEE

T2 - 52nd IEEE International Symposium on Circuits and Systems (ISCAS 2020)

Y2 - 10 October 2020 through 21 October 2020

ER -

A 75kb SRAM in 65nm CMOS for in-memory computing based neuromorphic image denoising

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