Thread Criticality driven Hybrid Coherence Framework for High Performance and Low Power Multi-core Systems

Description

As technology moving towards multi-core/many-core architectures, cache coherence protocol is becoming a critical component for performance and energy consumption. Cache coherence protocol is utilized to guarantee the coherent view of the shared memory under multi-core systems. Two types of cache coherence protocols are often employed. Snooping protocol can provide low latency coherence handling at the cost of traffic-intensive broadcast/multicast. Directory protocol achieves minimal traffic through long latency and indirect directory query. Currently, none of the existing technique takes the latency of the running threads into consideration. This project aims to develop a novel cache coherence framework that provides dedicated coherence handling for co-running threads according to their relative criticality. This framework will utilize snooping-like protocol to boost the performance of critical threads, and for non-critical threads, directory protocol will be utilized to reduce the energy dissipation. The proposed technique has potential in improving both performance and energy dissipation.