Secure RISC-V Platform for IoT Devices

Description

Internet of Thing (IoT) devices have become the mainstream nowadays in reality in recent years. The success and the potential of the IoT market can be easily witnessed, however we cannot ignore that IoT devices also suffer from severe security threats. The main reason is that there is no specialized security standard for IoT applications. The lightweight feature can be sacrificed when traditional solutions are applied to guarantee a certain degree of security. However, this lightweight feature is the main advantage of IoT devices. The security issue is usually ignored for profits in tremendous applications. Based on this background, the major concern of this project is to develop industry solutions based on the open core, RISC-V, that not only satisfy the requirement of low cost, but are also compatible with current and future cryptographic protocol change. This proposed project consists of three parts: a lightweight secure processor, a digital True Random Number Generator (TRNG) as the root of trust, and a digital signature core. The secure processor is a common core to develop IoT security. Considering the limited computation capability of IoT devices, complex software-hardware hybrid measures, such as TrustZone technology, are not cost-friendly solutions. First, the division of the main processor and cryptographic coprocessor are inherited from smart card devices. Additionally, the main processor is extended with minimal security features that protect the Root of Trust (RoT) of the system. Transparent encryption is applied between the communication of the main processor and the coprocessor. A corresponding protocol using the device is proposed. A RISC-V core is extended with the proposed feature, with instruction extensions and compiler supports. Our goal of this project is to design an architecture that can preserve the secrets, even the device is completely compromised by a hostile attacker, for industrial applications.