Owing to the ending of Moore’s law in Si-based technology, two -dimensional integrated circuit (2D IC) is being replaced by three-dimensional integrated circuit (3D IC). We recall that in the initial 3D IC, micro-bump solder joint technology is used. With decreasing size of micro-bump, the pitch of solder micro-bump is limited to about 20 microns. Below that, the neighboring solder joints may touch each other during wetting. Thus, hybrid bonding which has Cu-to-Cu bonding together with SiO2-to-SiO2 bonding is being developed to replace micro-bump solder technology for vertical stacking in three dimensions. Yet, hybrid bonding has encountered some serious technical issues. First, a high temperature of 300 C is required. Second, during thermal compression bonding, interfacial oxide or impurity may affect the bonding quality. Third, it is hard to achieve both Cu-to-Cu bonding and SiO2-to-SiO2 bonding at the same time. In the proposal, we shall useoriented nano-twin Cu (nt-Cu) to facilitate low temperature hybrid bonding at 200 C. Under thermal compression, due to the stress gradient on the bonding interface, surface creep occurs to achieve the low temperature bonding at 200 C. To overcome the surface oxide or impurity problem, we shall clean the Cu surface by sputtering or chemical etching and cleaning. To achieve both Cu-to-Cu and SiO2-to-SiO2 bonding at the same time, we shall control the dishing depth of Cu.