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Lightweight Formal Methods for Power and Timing Analysis of Memory Architectures

  • XUE, Chun Jason (Principal Investigator / Project Coordinator)
  • Chakraborty, Samarjit (Co-Investigator)
  • DIETRICH, Benedikt (Co-Investigator)

Project: Research

Project Details

Description

Develop models, analysis techniques and algorithms to systematically analyze the influence of different memory architectures on application performance (in particular timing properties) and power consumptionInvestigate cache locking techniques to improve the timing predictability of safety-critical applicationsDevelop design and analysis techniques for modern memory technologies like flash and other non-volatile memories (like Phase Change Memory and Magnetic RAMs), with the goal of improving the longevity of such memories, improving timing predictability and reducing power consumptionImplement the developed analysis and design methods into prototype tools
Project number9053009
Grant typeGer/HKJRS
StatusFinished
Effective start/end date1/01/113/05/13

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