Prof. HO Johnny Chung Yin (何頌賢)

Dr. Johnny Ho obtained his B.S. in chemical engineering with high honors from the University of California at Berkeley in 2002. Before attending graduate school, he worked as a process engineer at National Semiconductor in Silicon Valley. He then received his M.S. and Ph.D. in materials science and engineering from the University of California at Berkeley in 2005 and 2009, respectively, specializing in the topic of design of nano-materials for next-generation electronics under the supervision of Professor Ali Javey in electrical engineering. Before beginning his academic position at City University of Hong Kong, he performed studies on energy-harvesting devices as a post-doctoral fellow at Lawrence Livermore National Laboratory, California. His research interest is highly interdisciplinary involving chemistry, physics, materials science and various engineering disciplines to explore novel nano-materials and nano-engineering techniques for technological applications.

- Monolayer Assisted Nano-Scale Processing

Device scaling has been the driving force for technology advancements in the semiconductor industry over the last few decades. This scaling presents a tremendous challenge to fabricate nano-scale devices controllably and cost-effectively. In this regard, we aim to explore the manipulation of the surface properties of semiconductor nanostructures to enable alternative and novel nano-scale device fabrication schemes.

- Synthesis and Characterization of Fundamental Properties of Nano-Materials

Recently, nano-materials have attracted a large amount of research attention due to the unique physical properties of materials at the nano-scale. We are interested in developing new synthesis techniques to enable new functionalities of nano-materials. At the same time, it is essential to study and understand the fundamental properties of the materials in order to tailor them for technological applications.    

- Large-Scale and Heterogeneous Integration of Nano-Materials for Flexible and High Performance Technological Applications

Although numerous amazing properties of nano-materials such as nanowires (NW) have been reported, the controlled and uniform assembly of “bottom-up” NW materials with high scalability is still one of the significant bottleneck challenges to integrate NWs for practical technological applications. In this regard, we have achieved a high throughput and generic printing approach to assemble NWs on any substrate including Si, plastics, paper, and glass. With this approach, nano-materials based electronic, energy-harvesting, photonic and sensor applications will be explored. 

Ho Research Group for Nano-Materals and Nano-Engineering Laboratory

Intel Foundation Ph.D. Fellowship, U.S.A. (2007 – 2009)