Hei WONG

Research activity per year

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2017
High-κ Dielectric Scaling for Nano-CMOS Technology
Wong, H., Kawanago, T., Kakushima, K. & Iwai, H., 22 Nov 2017, Integrated Nanodevice and Nanosystem Fabrication: Breakthroughs and Alternatives. Deleonibus, S. (ed.). Pan Stanford Publishing Pte. Ltd., Vol. 2. p. 125-179 (Pan Stanford Series on Intelligent Nanosystems ; vol. 2).
Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 12 - Chapter in an edited book (Author) › peer-review
2013
MOSFETs
Iwai, H., Sze, S. M., Taur, Y. & Wong, H., 2013, Guide to State-of-the-Art Electron Devices. Burghartz, J. N. (ed.). John Wiley & Sons, p. 21-36
Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 12 - Chapter in an edited book (Author) › peer-review
14 Citations (Scopus)
2008
High-K Gate Dielectrics
Wong, H., Shiraishi, K., Kakushima, K. & Iwai, H., 1 Oct 2008, Electronic Device Architectures for the Nano-CMOS Era: From Ultimate CMOS Scaling to Beyond CMOS Devices. Deleonibus, S. (ed.). Pan Stanford Publishing Pte. Ltd., p. 105-140
Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 12 - Chapter in an edited book (Author) › peer-review
2 Citations (Scopus)

Prof. Hei WONG, 王曦