Dr. CHEUNG Chak Chung Ray (張澤松)

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Research Output

  1. 2012
  2. Published

    Subthreshold CMOS voltage reference circuit with body bias compensation for process variation

    Luo, H., Han, Y., Cheung, R. C. C., Liang, G. & Zhu, D., May 2012, In: IET Circuits, Devices and Systems. 6, 3, p. 198-203

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62) › 21_Publication in refereed journal › peer-review

    Scopus citations: 19
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  3. Published

    An FPGA-based acceleration platform for auction algorithm

    Zhu, P., Zhang, C., Li, H., Cheung, R. C. C. & Hu, B., 2012, ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems. p. 1002-1005 6271395

    Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45) › 32_Refereed conference paper (with ISBN/ISSN) › peer-review

    Scopus citations: 3
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  4. Published

    Area-efficient architectures for large integer and quadruple precision floating point multipliers

    Jaiswal, M. K. & Cheung, R. C. C., 2012, Proceedings of the 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines, FCCM 2012. p. 25-28 6239786

    Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45) › 32_Refereed conference paper (with ISBN/ISSN) › peer-review

    Scopus citations: 11
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  5. Published

    Area-efficient FPGA implementation of quadruple precision floating point multiplier

    Jaiswal, M. K. & Cheung, R. C. C., 2012, Proceedings of the 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2012. p. 376-382 6270665

    Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45) › 32_Refereed conference paper (with ISBN/ISSN) › peer-review

    Scopus citations: 3
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  6. Published

    FPGA implementation of SRAM-based ternary content addressable memory

    Ullah, Z., Jaiswal, M. K., Chan, Y. C. & Cheung, R. C. C., 2012, Proceedings of the 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2012. p. 383-389 6270666

    Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45) › 32_Refereed conference paper (with ISBN/ISSN) › peer-review

    Scopus citations: 22
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  7. Published

    GPU-based biclustering for neural information processing

    Lo, A. W. Y., Liu, B. & Cheung, R. C. C., 2012, Neural Information Processing: 19th International Conference, ICONIP 2012, Proceedings. PART 5 ed. Springer Verlag, Vol. 7667 LNCS. p. 134-141 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 7667 LNCS).

    Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45) › 32_Refereed conference paper (with ISBN/ISSN) › peer-review

    Scopus citations: 3
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  8. Published

    High performance reconfigurable architecture for double precision floating point division

    Jaiswal, M. K. & Cheung, R. C. C., 2012, Reconfigurable Computing: Architectures, Tools and Applications: 8th International Symposium, ARC 2012, Proceedings. Springer Verlag, Vol. 7199 LNCS. p. 302-313 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 7199 LNCS).

    Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45) › 32_Refereed conference paper (with ISBN/ISSN) › peer-review

    Scopus citations: 7
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  9. Published

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics): Preface

    Choy, O., Cheung, R., Athanas, P. & Sano, K., 2012, In: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 7199 LNCS

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62) › Editorial Preface

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  10. Published

    Low complexity and hardware-friendly spectral modular multiplication

    Chen, D. D., Yao, G. X., Koç, Ç. K. & Cheung, R. C. C., 2012, FPT 2012 - 2012 International Conference on Field-Programmable Technology. p. 368-375 6412162

    Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45) › 32_Refereed conference paper (with ISBN/ISSN) › peer-review

    Scopus citations: 3
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  11. Published

    Reconfigurable computing: architectures, tools and applications : 8th International Symposium, ARC 2012, Hong Kong, China, March 19-23, 2012. Proceedings

    Choy, O. C. S. (ed.), CHEUNG, C. C. R. (ed.), Athanas, P. M. (ed.) & Sano, K. (ed.), 2012, Berlin, New York: Springer. (Lecture notes in computer science; vol. 7199)

    Research output: Scholarly Books, Monographs, Reports and Case Studies (RGC: 11, 13, 14, 48, 49) › 14_Edited book (Editor)

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  12. 2011
  13. Published

    High-performance and scalable system architecture for the real-time estimation of generalized laguerre-volterra MIMO model from neural population spiking activity

    Li, W. X. Y., Chan, R. H. M., Zhang, W., Cheung, R. C. C., Song, D. & Berger, T. W., Dec 2011, In: IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 1, 4, p. 489-501 6112182.

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62) › 21_Publication in refereed journal › peer-review

    Scopus citations: 16
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  14. Published

    High Performance FPGA Implementation of Double Precision Floating Point Adder/Subtractor

    JAISWAL, M. K. & Cheung, R. C. C., 1 Oct 2011, In: International Journal of Hybrid Information Technology. 4, 4, p. 71 - 80

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62) › 21_Publication in refereed journal › peer-review

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  15. Published

    A Hardware-based Computational Platform for Generalized Laguerre-Volterra MIMO Model for Neural Activities

    Li, W. X. Y., Chan, R. H. M., Zhang, W., Cheung, R. C. C., Song, D. & Berger, T. W., Sep 2011, Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, EMBS. IEEE, p. 7282-7285 6091698. (Conference proceedings : ... Annual International Conference of the IEEE Engineering in Medicine and Biology Society. IEEE Engineering in Medicine and Biology Society. Conference).

    Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45) › 32_Refereed conference paper (with ISBN/ISSN) › peer-review

    Scopus citations: 1
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  16. Published

    Rapid Single-Chip Secure Processor Prototyping on OpenSPARC FPGA Platform

    Szefer, J., Zhang, W., Chen, Y., Champagne, D., Chan, K., Li, W. X. Y., CHEUNG, R. C. C. & 1 others, Lee, R., 24 May 2011.

    Research output: Conference Papers (RGC: 31A, 31B, 32, 33) › 32_Refereed conference paper (no ISBN/ISSN) › peer-review

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  17. Published

    An FPGA-based Geometric Biclustering Accelerator for Genes microarray Data Analysis

    YU, C. W., Wang, Z., Cheung, R. C. C. & Yan, H., 14 Mar 2011.

    Research output: Conference Papers (RGC: 31A, 31B, 32, 33) › 32_Refereed conference paper (no ISBN/ISSN) › peer-review

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  18. Published

    FPGA-based Acceleration for Graph Similarity

    Zhu, P., CHEUNG, C. C. R., Li, H., Cui, L. & Hu, B., 14 Mar 2011.

    Research output: Conference Papers (RGC: 31A, 31B, 32, 33) › 32_Refereed conference paper (no ISBN/ISSN) › peer-review

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  19. Published

    FPGA architecture of generalized Laguerre-Volterra MIMO model for neural population activities

    Li, W. X. Y., Chan, R. H. M., Zhang, W., Yu, C. W., Cheung, R. C. C., Song, D. & Berger, T. W., 2011, Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011. p. 44-49 6044783

    Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45) › 32_Refereed conference paper (with ISBN/ISSN) › peer-review

    Scopus citations: 2
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  20. Published

    FPGA architecture of generalized laguerre-volterra MIMO model for neural population spiking activities

    Li, W. X. Y., Cheung, R. C. C., Zhang, W., Chan, R. H. M., Song, D. & Berger, T. W., 2011, Proceedings - IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2011. 5771285

    Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45) › 32_Refereed conference paper (with ISBN/ISSN) › peer-review

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  21. Published

    FPGA-based high-throughput and area-efficient architectures of the Hummingbird cryptography

    Min, B., Cheung, R. C. C. & Han, Y., 2011, IECON Proceedings (Industrial Electronics Conference). p. 3998-4002 6119963

    Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45) › 32_Refereed conference paper (with ISBN/ISSN) › peer-review

    Scopus citations: 3
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  22. Published

    FPGA implementation of pairings using residue number system and lazy reduction

    Cheung, R. C. C., Duquesne, S., Fan, J., Guillermin, N., Verbauwhede, I. & Yao, G. X., 2011, Cryptographic Hardware and Embedded Systems: 13th International Workshop, CHES 2011, Proceedings. Springer Verlag, Vol. 6917 LNCS. p. 421-441 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 6917 LNCS).

    Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45) › 32_Refereed conference paper (with ISBN/ISSN) › peer-review

    Scopus citations: 54
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