IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ISSNs: 1063-8210
Additional searchable ISSN (electronic): 1557-9999
Institute of Electrical and Electronics Engineers, United States
Scopus rating (2023): CiteScore 6.4 SJR 0.937 SNIP 1.516
Journal
Research Output
- 2024
- Online published
A 360° Tunable Phase Shifter With Low Phase Error Based on Bandpass Networks in 0.25-μ m GaN Technology
Zhao, H., Yan, X., Chu, H., Zhu, X. & Guo, Y., 12 Nov 2024, (Online published) In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
- Published
Gain and Power Enhancement With Coupled Technique for a Distributed Power Amplifier in 0.25-μm GaN HEMT Technology
Yan, X., Zhang, J., Lv, G., Chen, W. & Guo, Y., Aug 2024, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 32, 8, p. 1523-1534Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 3 - 2021
- Published
An Efficient Parallel Processor for Dense Tensor Computation
Huang, W.-P., Cheung, R. C. C. & Yan, H., Jul 2021, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 29, 7, p. 1335-1347Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 2 - 2020
- Published
RPE-TCAM: Reconfigurable Power-Efficient Ternary Content-Addressable Memory on FPGAs
Irfan, M., Ullah, Z., Chowdhury, M. H. & Cheung, R. C. C., Aug 2020, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 28, 8, p. 1925-1929 9099062.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 11 - 2018
- Published
PATH: Performance-Aware Task Scheduling for Energy-Harvesting Nonvolatile Processors
Li, J., Liu, Y., Li, H., Yuan, Z., Fu, C., Yue, J. & Feng, X. & 3 others, , Sept 2018, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 26, 9, p. 1671-1684Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 12 - Published
Memory-Based Architecture for Multicharacter Aho-Corasick String Matching
Wang, X. & Pao, D., Jan 2018, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 26, 1, p. 143-154Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 21 - 2017
- Published
DVFS-Based Long-Term Task Scheduling for Dual-Channel Solar-Powered Sensor Nodes
Wu, T., Liu, Y., Zhang, D., Li, J., Hu, X. S., Xue, C. J. & Yang, H., Nov 2017, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 11, p. 2981-2994Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 7 - Published
A 0.9-5.8-GHz Software-Defined Receiver RF Front-End with Transformer-Based Current-Gain Boosting and Harmonic Rejection Calibration
Wu, L., Ng, A. W. L., Zheng, S., Leung, H. F., Chao, Y., Li, A. & Luong, H. C., Aug 2017, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 8, p. 2371-2382 7918625.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 18 - Published
CP-FPGA: Energy-Efficient Nonvolatile FPGA with Offline/Online Checkpointing Optimization
Yuan, Z., Liu, Y., Li, J., Hu, J., Xue, C. J. & Yang, H., Jul 2017, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 7, p. 2153-2163 7889029.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 5 - Published
Maximizing Common Idle Time on Multicore Processors with Shared Memory
Fu, C., Zhao, Y., Li, M. & Xue, C. J., Jul 2017, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 7, p. 2095-2108 14 p., 7869408.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 4 - 2016
- Published
Efficient Data Placement for Improving Data Access Performance on Domain-Wall Memory
Chen, X., Sha, E.H.-M., Zhuge, Q., Xue, C. J., Jiang, W. & Wang, Y., 1 Oct 2016, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24, 10, p. 3094-3104 7445241.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 24 - Published
Exploiting Process Variation for Write Performance Improvement on NAND Flash Memory Storage Systems
Shi, L., Di, Y., Zhao, M., Xue, C. J., Wu, K. & Sha, E.H.-M., 1 Jan 2016, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24, 1, p. 334-337 7041199.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 43 - 2015
- Published
Joint profit and process variation aware high level synthesis with speed binning
Zhao, M., Orailoglu, A. & Xue, C. J., Sept 2015, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23, 9, p. 1640-1650Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 2 - Published
Low Overhead Software Wear Leveling for Hybrid PCM + DRAM Main Memory on Embedded Systems
Hu, J., Xie, M., Pan, C., Xue, C. J., Zhuge, Q. & Sha, E.H.-M., Apr 2015, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23, 4, p. 654-663 6820777.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 34 - Published
Z-TCAM: An SRAM-based architecture for TCAM
Ullah, Z., Jaiswal, M. K. & Cheung, R. C. C., Feb 2015, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23, 2, p. 402-406 6774983.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 77 - 2014
- Published
A unified write buffer cache management scheme for flash memory
Shi, L., Li, J., Li, Q., Xue, C. J., Yang, C. & Zhou, X., Dec 2014, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22, 12, p. 2779-2792 6705640.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 10 - Published
Compiler-assisted STT-RAM-based hybrid cache for energy efficient embedded systems
Li, Q., Li, J., Shi, L., Zhao, M., Xue, C. J. & He, Y., Aug 2014, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22, 8, p. 1829-1840 6588311.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 35 - Published
WCET-Aware re-scheduling register allocation for real-time embedded systems with clustered VLIW Architecture
Huang, Y., Shi, L., Li, J., Li, Q. & Xue, C. J., Jan 2014, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22, 1, p. 168-180 6414665.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 7 - 2013
- Published
Task allocation on nonvolatile-memory-based hybrid main memory
Tian, W., Zhao, Y., Shi, L., Li, Q., Li, J., Xue, C. J. & Li, M. & 1 others, , Jul 2013, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 21, 7, p. 1271-1284 6268363.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 20 - Published
Data allocation optimization for hybrid scratch pad memory with SRAM and nonvolatile memory
Hu, J., Xue, C. J., Zhuge, Q., Tseng, W.-C. & Sha, E.H.-M., Jun 2013, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 21, 6, p. 1094-1102 6248275.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 59