IEEE Transactions on Very Large Scale Integration (VLSI) Systems

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

ISSNs: 1063-8210

Additional searchable ISSN (Electronic): 1557-9999

Institute of Electrical and Electronics Engineers, United States

Scopus rating (2021): CiteScore 5.9 SJR 0.834 SNIP 1.474

Journal

Journal Metrics

Research Output

  1. 2014
  2. Speech processing on a reconfigurable analog platform

    Ramakrishnan, S., Basu, A., Chiu, L. K., Hasler, J., Anderson, D. & Brink, S., Feb 2014, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22, 2, p. 430-433 6450118.

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

    Scopus citations: 12
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  3. Published

    WCET-Aware re-scheduling register allocation for real-time embedded systems with clustered VLIW Architecture

    Huang, Y., Shi, L., Li, J., Li, Q. & Xue, C. J., Jan 2014, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22, 1, p. 168-180 6414665.

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

    Scopus citations: 6
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  4. 2013
  5. Published

    Task allocation on nonvolatile-memory-based hybrid main memory

    Tian, W., Zhao, Y., Shi, L., Li, Q., Li, J., Xue, C. J., Li, M. & 1 others, Chen, E., Jul 2013, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 21, 7, p. 1271-1284 6268363.

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

    Scopus citations: 19
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  6. Published

    Data allocation optimization for hybrid scratch pad memory with SRAM and nonvolatile memory

    Hu, J., Xue, C. J., Zhuge, Q., Tseng, W. & Sha, E. H., Jun 2013, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 21, 6, p. 1094-1102 6248275.

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

    Scopus citations: 53
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  7. Published

    Cooperating virtual memory and write buffer management for flash-based storage systems

    Shi, L., Li, J., Xue, C. J. & Zhou, X., 2013, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 21, 4, p. 706-719 6193235.

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

    Scopus citations: 12
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  8. 2012
  9. Published

    Decentralized and passive model order reduction of linear networks with massive ports

    Yan, B., Tan, S. X., Zhou, L., Chen, J. & Shen, R., May 2012, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 20, 5, p. 865-877 5741877.

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

    Scopus citations: 12
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  10. 2011
  11. Published

    Energy-efficient joint scheduling and application-specific interconnection design

    Xu, C. Q., Xue, C. J. & Sha, E. H., Oct 2011, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 19, 10, p. 1813-1822 5565543.

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

    Scopus citations: 3
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  12. A fully integrated architecture for fast and accurate programming of floating gates over six decades of current

    Basu, A. & Hasler, P. E., Jun 2011, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 19, 6, p. 953-962 5437216.

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

    Scopus citations: 20
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  13. 2009
  14. Hierarchical segmentation for hardware function evaluation

    Lee, D., Cheung, R. C. C., Luk, W. & Villasenor, J. D., Jan 2009, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 17, 1, p. 103-116 4689314.

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

    Scopus citations: 36
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  15. 2007
  16. Hardware generation of arbitrary random number distributions from uniform distributions via the inversion method

    Cheung, R. C. C., Lee, D., Luk, W. & Villasenor, J. D., Aug 2007, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 15, 8, p. 952-962

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

    Scopus citations: 49
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  17. A flexible architecture for precise gamma correction

    Lee, D., Cheung, R. C. C. & Villasenor, J. D., Apr 2007, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 15, 4, p. 474-478

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

    Scopus citations: 30
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  18. 2005
  19. Customizable elliptic curve cryptosystems

    Cheung, R. C. C., Telle, N. J., Luk, W. & Cheung, P. Y. K., Sep 2005, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 13, 9, p. 1048-1059

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

    Scopus citations: 77
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  20. A Hardware Gaussian Noise Generator Using the Wallace Method

    Lee, D., Luk, W., Villasenor, J. D., Zhang, G. & Leong, P. H. W., Aug 2005, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 13, 8, p. 911-920

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

    Scopus citations: 77
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  21. 2003
  22. Further Improve Circuit Partitioning Using GBAW Logic Perturbation Techniques

    Wu, Y., Cheung, C., Cheng, D. I. & Fan, H., Jun 2003, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 11, 3, p. 451-460

    Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

    Scopus citations: 11
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