IEEE Transactions on Very Large Scale Integration (VLSI) Systems

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

ISSNs: 1063-8210

Additional searchable ISSN (electronic): 1557-9999

Institute of Electrical and Electronics Engineers, United States

Scopus rating (2023): CiteScore 6.4 SJR 0.937 SNIP 1.516

Journal

Journal Metrics
21 - 36 out of 36Page size: 20

Research Output

  1. 2014
  2. Published

    A unified write buffer cache management scheme for flash memory

    Shi, L., Li, J., Li, Q., Xue, C. J., Yang, C. & Zhou, X., Dec 2014, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22, 12, p. 2779-2792 6705640.

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 10
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  3. Published

    Compiler-assisted STT-RAM-based hybrid cache for energy efficient embedded systems

    Li, Q., Li, J., Shi, L., Zhao, M., Xue, C. J. & He, Y., Aug 2014, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22, 8, p. 1829-1840 6588311.

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 35
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  4. Speech processing on a reconfigurable analog platform

    Ramakrishnan, S., Basu, A., Chiu, L. K., Hasler, J., Anderson, D. & Brink, S., Feb 2014, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22, 2, p. 430-433 6450118.

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 13
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  5. Published

    WCET-Aware re-scheduling register allocation for real-time embedded systems with clustered VLIW Architecture

    Huang, Y., Shi, L., Li, J., Li, Q. & Xue, C. J., Jan 2014, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22, 1, p. 168-180 6414665.

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 7
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  6. 2013
  7. Published

    Task allocation on nonvolatile-memory-based hybrid main memory

    Tian, W., Zhao, Y., Shi, L., Li, Q., Li, J., Xue, C. J. & Li, M. & 1 others, Chen, E., Jul 2013, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 21, 7, p. 1271-1284 6268363.

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 20
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  8. Published

    Data allocation optimization for hybrid scratch pad memory with SRAM and nonvolatile memory

    Hu, J., Xue, C. J., Zhuge, Q., Tseng, W.-C. & Sha, E.H.-M., Jun 2013, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 21, 6, p. 1094-1102 6248275.

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 59
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  9. Published

    Cooperating virtual memory and write buffer management for flash-based storage systems

    Shi, L., Li, J., Xue, C. J. & Zhou, X., 2013, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 21, 4, p. 706-719 6193235.

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 12
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  10. 2012
  11. Published

    Decentralized and passive model order reduction of linear networks with massive ports

    Yan, B., Tan, S.X.-D., Zhou, L., Chen, J. & Shen, R., May 2012, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 20, 5, p. 865-877 5741877.

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 14
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  12. 2011
  13. Published

    Energy-efficient joint scheduling and application-specific interconnection design

    Xu, C. Q., Xue, C. J. & Sha, E.H.-M., Oct 2011, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 19, 10, p. 1813-1822 5565543.

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 3
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  14. A fully integrated architecture for fast and accurate programming of floating gates over six decades of current

    Basu, A. & Hasler, P. E., Jun 2011, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 19, 6, p. 953-962 5437216.

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 28
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  15. 2009

  16. Hierarchical segmentation for hardware function evaluation

    Lee, D.-U., Cheung, R. C. C., Luk, W. & Villasenor, J. D., Jan 2009, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 17, 1, p. 103-116 4689314.

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 43
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  17. 2007

  18. Hardware generation of arbitrary random number distributions from uniform distributions via the inversion method

    Cheung, R. C. C., Lee, D.-U., Luk, W. & Villasenor, J. D., Aug 2007, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 15, 8, p. 952-962

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 60
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  19. A flexible architecture for precise gamma correction

    Lee, D.-U., Cheung, R. C. C. & Villasenor, J. D., Apr 2007, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 15, 4, p. 474-478

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 30
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  20. 2005

  21. Customizable elliptic curve cryptosystems

    Cheung, R. C. C., Telle, N.J.-B., Luk, W. & Cheung, P. Y. K., Sept 2005, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 13, 9, p. 1048-1059

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 78
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  22. A Hardware Gaussian Noise Generator Using the Wallace Method

    Lee, D.-U., Luk, W., Villasenor, J. D., Zhang, G. & Leong, P. H. W., Aug 2005, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 13, 8, p. 911-920

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 83
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  23. 2003

  24. Further Improve Circuit Partitioning Using GBAW Logic Perturbation Techniques

    Wu, Y.-L., Cheung, C.-C., Cheng, D. I. & Fan, H., Jun 2003, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 11, 3, p. 451-460

    Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

    Scopus citations: 11
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