IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ISSNs: 1063-8210
Additional searchable ISSN (electronic): 1557-9999
Institute of Electrical and Electronics Engineers, United States
Scopus rating (2023): CiteScore 6.4 SJR 0.937 SNIP 1.516
Journal
Research Output
- 2024
- Published
Gain and Power Enhancement With Coupled Technique for a Distributed Power Amplifier in 0.25-μm GaN HEMT Technology
Yan, X., Zhang, J., Lv, G., Chen, W. & Guo, Y., Aug 2024, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 32, 8, p. 1523-1534Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 1 - 2021
- Published
An Efficient Parallel Processor for Dense Tensor Computation
Huang, W., Cheung, R. C. C. & Yan, H., Jul 2021, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 29, 7, p. 1335-1347Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 2 - 2020
ADIC: Anomaly Detection Integrated Circuit in 65-nm CMOS Utilizing Approximate Computing
Kar, B., Gopalakrishnan, P. K., Bose, S. K., Roy, M. & Basu, A., Dec 2020, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 28, 12, p. 2518-2529 9185089.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 6- Published
RPE-TCAM: Reconfigurable Power-Efficient Ternary Content-Addressable Memory on FPGAs
Irfan, M., Ullah, Z., Chowdhury, M. H. & Cheung, R. C. C., Aug 2020, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 28, 8, p. 1925-1929 9099062.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 11 - 2018
- Published
PATH: Performance-Aware Task Scheduling for Energy-Harvesting Nonvolatile Processors
Li, J., Liu, Y., Li, H., Yuan, Z., Fu, C., Yue, J., Feng, X., & 3 others , Sept 2018, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 26, 9, p. 1671-1684Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 11 Boosting NVDIMM Performance with a Lightweight Caching Algorithm
Tsao, C., Chang, Y. & Kuo, T., Aug 2018, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 26, 8, p. 1518-1530 8337123.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 6- Published
Memory-Based Architecture for Multicharacter Aho-Corasick String Matching
Wang, X. & Pao, D., Jan 2018, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 26, 1, p. 143-154Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 21 - 2017
- Published
DVFS-Based Long-Term Task Scheduling for Dual-Channel Solar-Powered Sensor Nodes
Wu, T., Liu, Y., Zhang, D., Li, J., Hu, X. S., Xue, C. J. & Yang, H., Nov 2017, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 11, p. 2981-2994Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 6 - Published
A 0.9-5.8-GHz Software-Defined Receiver RF Front-End with Transformer-Based Current-Gain Boosting and Harmonic Rejection Calibration
Wu, L., Ng, A. W. L., Zheng, S., Leung, H. F., Chao, Y., Li, A. & Luong, H. C., Aug 2017, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 8, p. 2371-2382 7918625.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 17 - Published
CP-FPGA: Energy-Efficient Nonvolatile FPGA with Offline/Online Checkpointing Optimization
Yuan, Z., Liu, Y., Li, J., Hu, J., Xue, C. J. & Yang, H., Jul 2017, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 7, p. 2153-2163 7889029.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 5 - Published
Maximizing Common Idle Time on Multicore Processors with Shared Memory
Fu, C., Zhao, Y., Li, M. & Xue, C. J., Jul 2017, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 7, p. 2095-2108 14 p., 7869408.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 4 Antiwear Leveling Design for SSDs With Hybrid ECC Capability
Ho, C., Liu, Y., Chang, Y. & Kuo, T., Feb 2017, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 2, p. 488-501 7527690.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 11VLSI extreme learning machine: A design space exploration
Yao, E. & Basu, A., 1 Jan 2017, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 1, p. 60-74 7470473.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 41- 2016
- Published
Efficient Data Placement for Improving Data Access Performance on Domain-Wall Memory
Chen, X., Sha, E. H., Zhuge, Q., Xue, C. J., Jiang, W. & Wang, Y., 1 Oct 2016, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24, 10, p. 3094-3104 7445241.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 24 Reducing Data Migration Overheads of Flash Wear Leveling in a Progressive Way
Yang, M., Chang, Y., Kuo, T. & Chen, F., May 2016, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24, 5, p. 1808-1820 7331656.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 16- Published
Exploiting Process Variation for Write Performance Improvement on NAND Flash Memory Storage Systems
Shi, L., Di, Y., Zhao, M., Xue, C. J., Wu, K. & Sha, E. H., 1 Jan 2016, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24, 1, p. 334-337 7041199.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 42 - 2015
- Published
Joint profit and process variation aware high level synthesis with speed binning
Zhao, M., Orailoglu, A. & Xue, C. J., Sept 2015, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23, 9, p. 1640-1650Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 2 - Published
Low Overhead Software Wear Leveling for Hybrid PCM + DRAM Main Memory on Embedded Systems
Hu, J., Xie, M., Pan, C., Xue, C. J., Zhuge, Q. & Sha, E. H., Apr 2015, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23, 4, p. 654-663 6820777.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 34 - Published
Z-TCAM: An SRAM-based architecture for TCAM
Ullah, Z., Jaiswal, M. K. & Cheung, R. C. C., Feb 2015, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23, 2, p. 402-406 6774983.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 71 - 2014
- Published
A unified write buffer cache management scheme for flash memory
Shi, L., Li, J., Li, Q., Xue, C. J., Yang, C. & Zhou, X., Dec 2014, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22, 12, p. 2779-2792 6705640.Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Scopus citations: 10